Mapping Neural Networks on Domain-Specific Hardware Accelerators
Efficiently running deep neural networks requires the hardware acceleration of tensor contraction kernels. ; Spatial architectures are a natural fit, employing multiple processing elements and a custom memory hierarchy to exploit parallelism and data reuse. ; In turn, leveraging the full capabilities of such architectures requires a precise mapping to specify data movements and computation order. ; To address this, specialized mapping tools have been developed to explore the space of possible mappings and retrieve optimal ones, using analytical hardware models for performance feedback. ; In particular, the prompt availability of high-quality mappings is key to enabling several downstream tasks, like runtime resource allocation and hardware design space exploration. ; Therefore, the availability of fast and sound mapping tools is critical for present academic and industry-led research on AI hardware accelerators. ; ; Our studies will focus on the development of efficient and effective mapping techniques, as well as their integration into frameworks for hardware-software co-design.
Back to Current Students