Major research topic

Extending model-based design techniques to support machine learning applications integration and verification

Abstract

The demand for processing of unpredictable data and advanced decision making in space applications is increasingly pushing towards the introduction of Machine Learning (ML) models in onboard systems to enhance autonomous decision making in critical scenarios. ; The special characteristics of space missions require the use of structured development and verification methodologies like Model-Based Design to enable formal verification and guarantee compliance with the requirements. ; The TASTE framework, developed by the European Space Agency (ESA), offers a Model-Based Design toolchain for the development, implementation, verification, and deployment of heterogeneous embedded systems in space; nevertheless, it lacks support for the integration of ML models in its workflow. ; ; The aim of the proposed work is to extend the TASTE toolchain introducing a dedicated flow for the acceleration of ML models on heterogeneous systems. ; The proposed toolchain leverages modern compilation techniques such as Multi-Level Intermediate Representation (MLIR) and High-Level Synthesis (HLS) to create an end-to-end co-design framework that automates the ML model HW/SW partitioning, the generation of a target-optimized implementation, and the setup of a system-level simulation environment inspired by the principles of Model-Based Design. ; ; The proposed solution accepts Open Neural Network eXchange (ONNX) model descriptions and applies HW/SW partitioning through ad-hoc extensions of the ONNX-MLIR compiler enabling early-stage target-aware optimizations. ; Additionally, the PandA Bambu HLS tool, developed at Politecnico di Milano, is used to generate FPGA-based hardware accelerators and is extended to support arbitrary-precision floating-point formats for ML and to provide a fast simulation environment for system-level design verification. ; The proposed work extends the TASTE toolchain through a co-design MLIR- and HLS-based workflow for the integration and verification of heterogeneous FPGA-based accelerators in mission-critical embedded systems offering a complete open-source end-to-end solution for the deployment of machine learning.

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